entity keyboard is Port (clk: in std_logic; row: in std_logic_vector(3 downto 0); col: out std_logic_vector(3 downto 0); key: out std_logic_vector(3 downto 0)); end keyboard;

architecture Behavioral of keyboard is signal row_sel: std_logic_vector(3 downto 0); signal col_sel: std_logic_vector(3 downto 0); signal key_val: std_logic_vector(3 downto 0); signal input: std_logic_vector(3 downto 0); begin process(clk) begin if rising_edge(clk) then if row_sel = '1110' then row_sel <= '1101'; elsif row_sel = '1101' then row_sel <= '1011'; elsif row_sel = '1011' then row_sel <= '0111'; else row_sel <= '1110'; end if; end if; end process;

col <= col_sel;
key <= key_val;

process(row_sel, input)
begin
    case row_sel is
        when '1110' =>
            col_sel <= '1110';
            if input = '0001' then
                key_val <= '0001';
            elsif input = '0010' then
                key_val <= '0010';
            elsif input = '0011' then
                key_val <= '0011';
            elsif input = '0100' then
                key_val <= '1010';
            elsif input = '0101' then
                key_val <= '0000';
            elsif input = '0110' then
                key_val <= '1011';
            elsif input = '0111' then
                key_val <= '0011';
            elsif input = '1000' then
                key_val <= '0100';
            elsif input = '1001' then
                key_val <= '0101';
            else
                key_val <= '1111';
            end if;
        when '1101' =>
            col_sel <= '1101';
            if input = '0001' then
                key_val <= '0010';
            elsif input = '0010' then
                key_val <= '0001';
            elsif input = '0011' then
                key_val <= '1010';
            elsif input = '0100' then
                key_val <= '0011';
            elsif input = '0101' then
                key_val <= '1011';
            elsif input = '0110' then
                key_val <= '0000';
            elsif input = '0111' then
                key_val <= '0100';
            elsif input = '1000' then
                key_val <= '0101';
            elsif input = '1001' then
                key_val <= '0110';
            else
                key_val <= '1111';
            end if;
        when '1011' =>
            col_sel <= '1011';
            if input = '0001' then
                key_val <= '0011';
            elsif input = '0010' then
                key_val <= '1010';
            elsif input = '0011' then
                key_val <= '0001';
            elsif input = '0100' then
                key_val <= '1011';
            elsif input = '0101' then
                key_val <= '0010';
            elsif input = '0110' then
                key_val <= '0110';
            elsif input = '0111' then
                key_val <= '0000';
            elsif input = '1000' then
                key_val <= '0111';
            elsif input = '1001' then
                key_val <= '1000';
            else
                key_val <= '1111';
            end if;
        when '0111' =>
            col_sel <= '0111';
            if input = '0001' then
                key_val <= '1011';
            elsif input = '0010' then
                key_val <= '0011';
            elsif input = '0011' then
                key_val <= '1011';
            elsif input = '0100' then
                key_val <= '0110';
            elsif input = '0101' then
                key_val <= '1000';
            elsif input = '0110' then
                key_val <= '0111';
            elsif input = '0111' then
                key_val <= '0100';
            elsif input = '1000' then
                key_val <= '0101';
            elsif input = '1001' then
                key_val <= '0000';
            else
                key_val <= '1111';
            end if;
        when others =>
            col_sel <= '1111';
            key_val <= '1111';
    end case;
end process;

process(clk)
begin
    if rising_edge(clk) then
        if row_sel = '1110' and col_sel = '1111' then
            input <= '0001';
        elsif row_sel = '1110' and col_sel = '1110' then
            input <= '0010';
        elsif row_sel = '1110' and col_sel = '1101' then
            input <= '0011';
        elsif row_sel = '1110' and col_sel = '1100' then
            input <= '1010';
        elsif row_sel = '1101' and col_sel = '1111' then
            input <= '0011';
        elsif row_sel = '1101' and col_sel = '1110' then
            input <= '0001';
        elsif row_sel = '1101' and col_sel = '1101' then
            input <= '1010';
        elsif row_sel = '1101' and col_sel = '1100' then
            input <= '0010';
        elsif row_sel = '1011' and col_sel = '1111' then
            input <= '0011';
        elsif row_sel = '1011' and col_sel = '1110' then
            input <= '1010';
        elsif row_sel = '1011' and col_sel = '1101' then
            input <= '0001';
        elsif row_sel = '1011' and col_sel = '1100' then
            input <= '0110';
        elsif row_sel = '0111' and col_sel = '1111' then
            input <= '1011';
        elsif row_sel = '0111' and col_sel = '1110' then
            input <= '0011';
        elsif row_sel = '0111' and col_sel = '1101' then
            input <= '1011';
        elsif row_sel = '0111' and col_sel = '1100' then
            input <= '0100';
        else
            input <= '1111';
        end if;
    end if;
end process;

end Behavioral;

VHDL实现4x4矩阵键盘输入,clk为1kHz,数据0-9,6位输入

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