Verilog Key Debounce Module: Implementing Stable Key Input
Verilog Key Debounce Module: Ensuring Stable Input
This Verilog module implements a key debounce function, ensuring stable key input by filtering out bouncing signals. The module samples the key state and locks it in a register, eliminating transient changes.
module key_debounce(
input i_clk,
input i_rst_n,
input [9:1] i_key, // 按下为0,松开为1
output reg [9:1] o_key_val // 键值
);
//++++++++++++++++++++++++++++++++++++++
reg [9:1] key_samp1, key_samp1_locked;
// 将i_key采集至key_samp1
always @ (posedge i_clk, negedge i_rst_n)
if(!i_rst_n)
key_samp1 <= 9'h1FF;
else
key_samp1 <= i_key;
// 将key_samp1锁存至key_samp1_locked
always @ (posedge i_clk, negedge i_rst_n)
if(!i_rst_n)
key_samp1_locked <= 9'h1FF;
else
key_samp1_locked <= key_samp1;
//--------------------------------------
// Outputs the debounced key value
assign o_key_val = key_samp1_locked;
endmodule
Explanation:
- Input: The module takes the clock signal (i_clk), reset signal (i_rst_n), and the key input (i_key) as input. The key input is a 10-bit signal where a '0' represents a pressed key and a '1' represents a released key.
- Key Sampling: The module uses two registers,
key_samp1andkey_samp1_locked. Thekey_samp1register samples thei_keyvalue on every positive edge of the clock signal. This captures the current state of the key. - Debouncing: The
key_samp1_lockedregister holds the sampled value fromkey_samp1for one clock cycle. This delays the sampled value by one clock cycle. By comparing the values inkey_samp1andkey_samp1_locked, you can filter out short-duration bouncing signals that occur when a key is pressed or released. - Output: The module outputs the debounced key value in the
o_key_valregister. This output represents the stable key state after debouncing.
How it Works:
The key debounce logic works by capturing the key input (i_key) and holding the value for one clock cycle. This allows the module to filter out short-duration changes in the key input that are caused by bouncing. The output (o_key_val) reflects the stable key state after the debouncing process, ensuring that the key input is reliable and free from noise.
Applications:
This key debounce module is commonly used in embedded systems and hardware designs where accurate key input is required. It can be incorporated into any system where buttons, switches, or other mechanical input devices are used. This is a vital component for handling key presses in digital circuits, ensuring accurate and reliable input for control and data entry functions.
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