The clock source becomes more critical when undersampling, as the sensitivity to clock jitter or phase noise increases with higher input frequencies. For instance, a clock source that reduces the signal-to-noise ratio (SNR) of a full-scale signal by 1dB at 70MHz will decrease SNR by 3dB at 140MHz and 4.5dB at 190MHz.

Please paraphrase the paragraph belowUndersampling raises the bar on the clock source and the higher the input frequency the greater the sensitivity to clock jitter or phase noise A clock source that

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