Please paraphrase the paragraph belowThe lowest phase noise oscillators have single-ended sinusoidal outputs and for these devices the use of a filter close to the ADC may be beneficial This filter sh

The most accurate oscillators produce single-ended sinusoidal outputs, and using a filter near the analog-to-digital converter (ADC) can be advantageous for these devices. Placing the filter close to the ADC helps minimize roundtrip reflection times and reduces the vulnerability of the traces between the filter and the ADC. When dealing with close-in phase noise sensitivity, it is crucial to have a highly stable power supply for the oscillators and any buffers. Fluctuations in the supply can result in phase noise due to variations in propagation delay. While these clock sources may be considered digital devices, it is not recommended to operate them on a digital supply. If the clock is also responsible for driving digital devices like an FPGA, it is advisable to position the oscillator and any clock fan-out devices near the ADC and prioritize routing to the ADC. To prevent high-frequency noise from the FPGA from interfering with the clock fan-out device's substrate, the clock signals to the FPGA should have series termination at the driver. If an FPGA is used as a programmable divider, the signal must be re-timed using the original oscillator, and both the retiming flip-flop and the oscillator should be located near the ADC and powered by a very stable supply