Although these clock sources may be considered as digital devices, it is important not to operate them on a digital power source. If your clock is also responsible for driving digital devices like an FPGA, it is advised to place the oscillator and any clock fan-out devices near the ADC, and prioritize the routing to the ADC. The clock signals sent to the FPGA should be terminated in series at the driver to prevent high-frequency noise from the FPGA from disturbing the clock fan-out device's substrate. If you are using an FPGA as a programmable divider, the signal must be re-timed using the original oscillator. Both the retiming flip-flop and the oscillator should be positioned close to the ADC and powered by a very quiet power supply

Please paraphrase the paragraph belowEven though these clock sources may be regarded as digital devices do not operate them on a digital supply If your clock is also used to drive digital devices such

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