LIBRARY IEEE;--引用IEEE库USE IEEESTD_LOGIC_1164ALL;--STD_LOGIC数据类型定义在此程序包中USE IEEESTD_LOGIC_ARITHALL;--该程序包定义了一些不同类型数据之间相互转化的函数USE IEEESTD_LOGIC_UNSIGNEDALL;--该程序包定义了与unsigned数据类型相关的函数ENTITY ymxsdl IS--七

module ymxsdl( input wire XY, input wire TEST, input wire ZXY, input wire [3:0] D, output wire [6:0] Y );

assign Y = TEMP;

reg [6:0] TEMP;

always @(XY,TEST,ZXY,D) begin case ({XY,TEST,ZXY,D}) {1'b0,1'b1,1'b1,4'b0000}: TEMP = 7'b1111111; {1'b1,1'b0,1'b1,4'b0000}: TEMP = 7'b0000000; {1'b1,1'b1,1'b0,4'b0000}: TEMP = 7'b1111111; {1'b1,1'b1,1'b1,4'b0000}: TEMP = 7'b0000001; {1'b1,1'b1,1'b1,4'b0001}: TEMP = 7'b1001111; {1'b1,1'b1,1'b1,4'b0010}: TEMP = 7'b0010010; {1'b1,1'b1,1'b1,4'b0011}: TEMP = 7'b0000110; {1'b1,1'b1,1'b1,4'b0100}: TEMP = 7'b1001100; {1'b1,1'b1,1'b1,4'b0101}: TEMP = 7'b0100100; {1'b1,1'b1,1'b1,4'b0110}: TEMP = 7'b0100000; {1'b1,1'b1,1'b1,4'b0111}: TEMP = 7'b0001111; {1'b1,1'b1,1'b1,4'b1000}: TEMP = 7'b0000000; {1'b1,1'b1,1'b1,4'b1001}: TEMP = 7'b0000100; {1'b1,1'b1,1'b1,4'b1010}: TEMP = 7'b0001000; {1'b1,1'b1,1'b1,4'b1011}: TEMP = 7'b1100000; {1'b1,1'b1,1'b1,4'b1100}: TEMP = 7'b0110001; {1'b1,1'b1,1'b1,4'b1101}: TEMP = 7'b1000010; {1'b1,1'b1,1'b1,4'b1110}: TEMP = 7'b0110000; {1'b1,1'b1,1'b1,4'b1111}: TEMP = 7'b0111000; default: TEMP = 7'b0000000; endcase end

endmodul