改写在2008年 Salahuddin和Datta34提出了一种新的方法即使用铁电材料代替传统的晶体管栅介质材料以放大器件的栅电压。这种方法理论上可以降低器件的SS这种器件结构称为MFS图31a 具有结构简单的优点 但铁电层与沟道之间的不兼容性问题导致器件的界面性能差。为了解决这个问题人们提出了MFIS结构在铁电层和沟道之间加入传统栅介质层。这种结构成功地解决了界面问题但由于沟道表面电势在源漏之间

In 2008, Salahuddin and Datta proposed a novel approach to enhance the gate voltage of devices by using ferroelectric materials instead of traditional gate dielectric materials. This method theoretically reduces the device SS and is called the MFS structure (Figure 3.1(a)), which has the advantage of a simple structure. However, the incompatibility between the ferroelectric layer and the channel results in poor interface performance. To address this issue, the MFIS structure was proposed, which adds a traditional gate dielectric layer between the ferroelectric layer and the channel. This structure successfully solves the interface problem, but the voltage amplification effect of the ferroelectric material in the channel direction is different due to the variation of the channel surface potential between the source and drain, while the surface potential distribution on the ferroelectric layer is uniform. To solve this problem, some propose adding a metal layer between the gate dielectric layer and the ferroelectric layer, i.e., the MFMIS structure. However, this structure increases device manufacturing difficulty, is unfavorable for further reducing device size, and increases gate leakage current, lowering device stability. Compared to the MFMIS structure, the capacitance matching of the MFIS structure NCFET is more stable. Therefore, the MFIS structure remains the main choice for future Fe-NCFETs to reduce plagiarism