Please paraphrase the paragraph belowIf you use an FPGA as a programmable divider you must re-time the signal using the original oscillator and the retiming flip-flop as well as the oscillator should

In order to utilize an FPGA as a configurable divider, it is necessary to synchronize the signal by employing the initial oscillator. Both the retiming flip-flop and the oscillator should be positioned near the ADC, and powered by a stable and noise-free source.