#ifndef _DRV_CFG_H#define _DRV_CFG_H------------------------------------------------------------------------------------- 系统参数设置#define FMASTER 16000000#define CLOCK_TICK 250us ms------

#ifndef _DRV_CFG_H #define _DRV_CFG_H

//------------------------------------------------------------------------------------- // 系统参数设置 #define FMASTER 16000000 #define CLOCK_TICK 250//us //ms

//------------------------------------------------------------------------------------- // 系统单片机型号 #define _STM8S003F3 (1)

//------------------------------------------------------------------------------------- // 开发环境 #define _ST_IAR (1) #define __DI() asm ("SIM") #define __EI() asm ("RIM")

//------------------------------------------------------------------------------------- // MCU模块配置 #define _M_DRV (0x1000) #define _M_DRV_CHK (_M_DRV+0x01)

// MCU #define _M_DRV_MCU (_M_DRV+0x100) #define _M_DRV_MCU_INIT (_M_DRV+0x100+1)

// CPU #define _M_DRV_MCU_CPU (_M_DRV+0x100) #define _M_DRV_MCU_CPU_RST (0)//(_M_DRV_MCU_CPU+1) #define _M_DRV_MCU_CPU_CHK (_M_DRV_MCU_CPU+2)

// Clock #define _M_DRV_MCU_CPU_CLK_INIT (_M_DRV_MCU_CPU+3) #define _M_DRV_MCU_CPU_CLK_CHK (_M_DRV_MCU_CPU+4)

// WDT #define _M_DRV_MCU_CPU_WDT (_M_DRV_MCU_CPU+5) #define _M_DRV_MCU_CPU_IWDG (_M_DRV_MCU_CPU+6) #define _M_DRV_MCU_CPU_WWDG (0)//(_M_DRV_MCU_CPU+7) #define _M_DRV_MCU_CPU_WDT_CHK (_M_DRV_MCU_CPU+8)

// PORT #define _M_DRV_MCU_PORT (_M_DRV+0x200) #define _M_DRV_MCU_PORT_INIT (_M_DRV_MCU_PORT+1) #define _M_DRV_MCU_PORT_CHK (_M_DRV_MCU_PORT+2) #define _M_DRV_MCU_PORT_CHK_SHORT (0)//(_M_DRV_MCU_PORT+3)

#define _M_DRV_MCU_PORT_0 (_M_DRV_MCU_PORT+1) #define _M_DRV_MCU_PORT_1 (_M_DRV_MCU_PORT+2) #define _M_DRV_MCU_PORT_2 (_M_DRV_MCU_PORT+3) #define _M_DRV_MCU_PORT_3 (_M_DRV_MCU_PORT+4) #define _M_DRV_MCU_PORT_4 (0)//(_M_DRV_MCU_PORT+5) #define _M_DRV_MCU_PORT_5 (0)//(_M_DRV_MCU_PORT+6) #define _M_DRV_MCU_PORT_6 (0)//(_M_DRV_MCU_PORT+7)

#define _M_DRV_MCU_PORT_CR1 (_M_DRV_MCU_PORT+10) #define _M_DRV_MCU_PORT_0_CR1 (_M_DRV_MCU_PORT_CR1+1) #define _M_DRV_MCU_PORT_1_CR1 (_M_DRV_MCU_PORT_CR1+2) #define _M_DRV_MCU_PORT_2_CR1 (_M_DRV_MCU_PORT_CR1+3) #define _M_DRV_MCU_PORT_3_CR1 (_M_DRV_MCU_PORT_CR1+4) #define _M_DRV_MCU_PORT_4_CR1 (0)//(_M_DRV_MCU_PORT_CR1+5) #define _M_DRV_MCU_PORT_5_CR1 (0)//(_M_DRV_MCU_PORT_CR1+6) #define _M_DRV_MCU_PORT_6_CR1 (0)//(_M_DRV_MCU_PORT_CR1+7)

#define _M_DRV_MCU_PORT_CR2 (_M_DRV_MCU_PORT+20) #define _M_DRV_MCU_PORT_0_CR2 (_M_DRV_MCU_PORT_CR2+1) #define _M_DRV_MCU_PORT_1_CR2 (_M_DRV_MCU_PORT_CR2+2) #define _M_DRV_MCU_PORT_2_CR2 (_M_DRV_MCU_PORT_CR2+3) #define _M_DRV_MCU_PORT_3_CR2 (_M_DRV_MCU_PORT_CR2+4) #define _M_DRV_MCU_PORT_4_CR2 (0)//(_M_DRV_MCU_PORT_CR2+5) #define _M_DRV_MCU_PORT_5_CR2 (0)//(_M_DRV_MCU_PORT_CR2+6) #define _M_DRV_MCU_PORT_6_CR2 (0)//(_M_DRV_MCU_PORT_CR2+7)

#define _M_DRV_MCU_EXTI (0)//(_M_DRV+0x400) #define _M_DRV_MCU_EXTI_RST (0) #define _M_DRV_MCU_EXTI_INIT (0)//(_M_DRV_MCU_EXTI+1) #define _M_DRV_MCU_EXTI_CHK (0)//(_M_DRV_MCU_EXTI+2)

// TIME #define _M_DRV_MCU_TIME (_M_DRV+0x300) #define _M_DRV_MCU_TIME_RST (_M_DRV_MCU_TIME+1) #define _M_DRV_MCU_TIME_INIT (_M_DRV_MCU_TIME+2) #define _M_DRV_MCU_TIME_CHK (_M_DRV_MCU_TIME+3) #define _M_DRV_MCU_TIME_1 (0)//(_M_DRV_MCU_TIME+4) #define _M_DRV_MCU_TIME_2 (_M_DRV_MCU_TIME+5) #define _M_DRV_MCU_TIME_3 (0)//(_M_DRV_MCU_TIME+6) #define _M_DRV_MCU_TIME_4 (0)//(_M_DRV_MCU_TIME+7) #define _M_DRV_MCU_TIME_5 (0)//(_M_DRV_MCU_TIME+8) #define _M_DRV_MCU_TIME_6 (0)//(_M_DRV_MCU_TIME+9) #define _M_DRV_MCU_TIME_133US (0)//(_M_DRV_MCU_TIME+10) #define _M_DRV_MCU_TIME_166US (0)//(_M_DRV_MCU_TIME+11) #define _M_DRV_MCU_TIME_2MS (0)//(_M_DRV_MCU_TIME+12) #define _M_DRV_MCU_TIME_10MS (0)//(_M_DRV_MCU_TIME+13) #define _M_DRV_MCU_TIME_1MS (0)//(_M_DRV_MCU_TIME+14) #define _M_DRV_MCU_TIME_500US (_M_DRV_MCU_TIME+15)

// AD #define _M_DRV_MCU_AD (_M_DRV+0x500) #define _M_DRV_MCU_AD_RST (_M_DRV_MCU_AD+1) #define _M_DRV_MCU_AD_INIT (_M_DRV_MCU_AD+2) #define _M_DRV_MCU_AD_CHK (0)//(_M_DRV_MCU_AD+3)

// CCP #define _M_DRV_MCU_CCP (0)//(_M_DRV+0x600) #define _M_DRV_MCU_CCP_RST (0)//(_M_DRV_MCU_CCP+1) #define _M_DRV_MCU_CCP_INIT (0)//(_M_DRV_MCU_CCP+2) #define _M_DRV_MCU_CCP_CHK (0)//(_M_DRV_MCU_CCP+3) #define _M_DRV_MCU_CCP_PWM (0)//(_M_DRV_MCU_CCP+4) #define _M_DRV_MCU_CCP_CAP (0)//(_M_DRV_MCU_CCP+5) #define _M_DRV_MCU_TIME1_CCP_PWM (0)//(_M_DRV_MCU_CCP+6) #define _M_DRV_MCU_TIME2_CCP_PWM (0)//(_M_DRV_MCU_CCP+7)

// SPI #define _M_DRV_MCU_SPI (0)//(_M_DRV+0x700) #define _M_DRV_MCU_SPI_RST (0) #define _M_DRV_MCU_SPI_INIT (0)//(_M_DRV_MCU_SPI+2) #define _M_DRV_MCU_SPI_CHK (0)//(_M_DRV_MCU_SPI+3)

// EEPROM #define _M_DRV_MCU_EEPROM (0)//(_M_DRV+0x800) #define _M_DRV_MCU_EEPROM_RST (0)//(_M_DRV+0x800) #define _M_DRV_MCU_EEPROM_INIT (0)//(_M_DRV+0x800) #define _M_DRV_MCU_EEPROM_CHK (0)//(_M_DRV+0x800)

// UART #define _M_DRV_MCU_UART (0)//(_M_DRV+0xB00) #define _M_DRV_MCU_UART_RST (0) #define _M_DRV_MCU_UART_INIT (0) #define _M_DRV_MCU_UART_CHK (0)

// AWU #define _M_DRV_MCU_AWU (0)//(_M_DRV_MCU + 0xE00)

#endi